In a manufacturing process of various semiconductor devices, widely employed to form a desired pattern on a desired layer on a target substrate such as a semiconductor wafer is a plasma etching process for etching the target substrate by using a plasma while employing a resist as a mask. Among various plasma etching apparatuses for performing such plasma etching process, a capacitively coupled parallel plate type etching apparatus has been most frequently employed.
The capacitively coupled parallel plate type plasma etching apparatus includes a pair of parallel plate type electrodes (an upper electrode and a lower electrode) disposed in a chamber, wherein by applying a high frequency power to either one of the two electrodes while concurrently introducing a processing gas into the chamber, a high frequency electric field is formed between the two electrodes. Then, the high frequency electric field converts the processing gas into a plasma, so that a plasma etching can be performed on a desired layer of the semiconductor wafer by using the plasma. Specifically, there is known a plasma etching apparatus which generates a plasma in a plasma state by applying a high frequency power for plasma generation to an upper electrode while applying a high frequency power for ion attraction to a lower electrode. With this plasma etching apparatus, a highly reproducible etching process can be carried out with a high etching selectivity.
Meanwhile, to keep up with a recent demand for micro-processing, the thickness of a photoresist film used as a mask is getting thinner, and the kind of the photoresist is switched from a KrF photoresist (i.e., a photoresist exposed to a laser beam of which emission source is a KrF gas) to an ArF photoresist (i.e., a photoresist exposed to a laser beam having a shorter wavelength of which emission source is an ArF gas) suitable for forming a pattern opening not greater than about 0.13 μm. Since, however, the ArF photoresist is of a low plasma resistance, it suffers a surface roughening during an etching that hardly occurs when the KrF photoresist is used. Accordingly, there occur such problems as a formation of longitudinal strips (striation) on inner wall surfaces of openings, an increase of critical dimension (CD) due to an enlargement of opening width which results from etching of shoulder portions thereof or the like. As a result, due to the thin thickness of the photoresist together with the above problems, it is difficult to form an etching hole with a sufficient etching selectivity against the mask.
To solve the above problems, International Publication No. WO2005/124844 (Claims, etc.) discloses a plasma processing method in which a plasma etching is performed while a DC voltage is being applied to the upper electrode, in order to perform the plasma etching with a high mask selectivity by allowing a plasma resistance of an organic mask layer such as a resist layer or the like to be maintained high. Further, Japanese Patent Laid-open Application No. H10-12597 (FIG. 2, etc.) discloses a plasma etching method in which a DC voltage is applied to a sub electrode, which is additionally provided besides upper and lower facing electrodes, so as to lower an electron energy distribution in a plasma.
In an etching, it is important to secure a sufficient etching selectivity of an etching target layer against a base layer serving as an etching stop layer as well as achieving a sufficient etching rate for etching the etching target layer. However, if the output of the high frequency power for plasma generation is increased to improve the etching rate, an electron density of the plasma also increases, resulting in a dissociation of a fluorocarbon-based processing gas such as C4F6, C4F8 or the like. As a consequence, the etching selectivity against the base layer deteriorates greatly, causing a film thickness loss of the base layer to be increased due to the etching. That is, the achievement of the high etching rate and the achievement of high etching selectivity against the base layer are in a trade-off relation in a specific application (e.g., in a combination of a specific processing gas, an etching target layer and a base layer), and so it is difficult to satisfy both requirements at the same time.
One example of such application is a case of etching an organic film such as a SiOC film by using a fluorocarbon gas such as C4F6, C4F8 or the like while employing an ArF photoresist as an etching mask. In this case, it is very difficult to secure a sufficient etching selectivity against a base layer serving as a stopper (e.g., a SiC film, a SiN film, a SiCN film or the like), while achieving a sufficient etching rate as well. Further, another example of such application is a case of etching a SiO2 layer by using a CF based gas such as C4F6 or C4F8 while employing an ArF photoresist as an etching mask. In this case, it is also difficult to secure a sufficient etching rate while concurrently achieving a sufficient etching selectivity against a base layer (e.g., a Si substrate, a SiN film or the like) serving as a stopper.
The method of the International Publication No. WO2005/124844 is advantageous in that it enables micro-processing by suppressing a dissociation of, e.g., the fluorocarbon-based etching gas, suppressing an etching of an organic mask such as the resist layer, and preventing the surface roughening of the resist layer by means of applying the DC voltage to the upper electrode. However, the method dose not provide any specific description of the way to achieve a sufficient etching rate and a sufficient etching selectivity against the base layer in relation with an application concerning kinds of gases and films involved, and the like.